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Senior ASIC IP Design Engineer

Job ID: 1900846 | Services LLC


Job summary
The team that built the innovative Silicon IP AZ1 &2 Neural Edge that power the latest generation of Echo devices is looking for a Senior ASIC IP Design Engineer to continue to innovate on behalf of our customers. We are a part of Amazon Lab126 that revolutionized reading with our Kindle family of products, reimagined user experience through Echo and Alexa, and is delighting customers anew with our Astro personal robot. We want you to help us build on the success of our first generation of ML accelerator at edge.

In this role you will design and implement ASIC IPs to be integrated into SoCs for a range of Amazon devices. You will work closely with Architects, IP vendors, design verification and physical design teams to deliver best in class core ASIC IPs including CPU, memory controllers and system fabrics. You will own selected IP from architecture through integration into various SoCs. You will help define the processes, methods and tools for design and implementation of large complex ASICs and mentor less experienced engineers.

Key job responsibilities

  • Micro-architect complex subsystems based on requirements from SoC and System architects
  • Work with external IP and EDA vendors to source best in class components and tools
  • Design and code functional blocks to customize and optimize subsystems for integration
  • Work closely with design verification and software teams to assure high quality design
  • Drive implementation including synthesis, timing analysis, test and physical implementation
  • Provide technical leadership through personal example, mentorship, and strong teamwork
  • Write precise and concise documentation for efficient HW/SW partition and implementation


  • BS degree or higher in EE or CE or CS
  • 7+ years or more of practical semiconductor design experience including IP design
  • In-depth knowledge and experience with CPU, Memory Controllers, and SoC Fabrics
  • Successful tape outs of complex, high-volume SoCs in advanced design nodes.
  • Experience writing HDL in Verilog/SystemVerilog
  • Experience working with DV teams doing verification, FPGA and emulation
  • Experience working with Physical Design teams doing synthesis, timing analysis and DFT


  • Architecture or System Engineering experience
  • Experience developing with modern programming languages (Python, Java, C/C++), open-source technologies, and Linux.
  • Experience with advance design verification (UVM, formal, Emulation, FPGA)
  • Experience with gate level testing and multi clock design practices (CDC)
  • Experience working with software teams to tightly define the HW/SW interface including control/status registers, and error handling.
  • Experience working closely with physical design teams to develop highly optimized ASICs with excellent power, performance and area.
  • SOC bring-up and post silicon validation experience
  • Experience with early power analysis
  • Excellent verbal and written communication skills

Amazon is committed to a diverse and inclusive workplace. Amazon is an equal opportunity employer and does not discriminate on the basis of race, national origin, gender, gender identity, sexual orientation, protected veteran status, disability, age, or other legally protected status. For individuals with disabilities who would like to request an accommodation, please visit